Skip header content and main navigation Binghamton University, State University of New York - Ieec
 

Tear Down Picture Gallery

(The contents of this page are presented by permission of and collaboration with Prismark Partners.)

Teardown analyses may range from an in depth study of a single device to a broad survey of the construction of a circuit board with many components mounted on the surface.  For example, the front and back sides of a processor board for a tablet is shown in the photograph; note that components are mounted on both sides.

Tear down analyses may range from an in depth study of a single device to a broad survey of the construction of a circuit board with many components mounted on the surface.  For example, the front and back sides of a processor board for a tablet is shown in the photograph; note that components are mounted on both sides.

A rather interesting structure is seen in the central module on the front side of the card.  The X-ray shows three sets of BGAs.

A rather interesting structure is seen in the central module on the front side of the card.  The X-ray shows three sets of BGAs.

Teardown analyses may range from an in depth study of a single device to a broad survey of the construction of a circuit board with many components mounted on the surface.  For example, the front and back sides of a processor board for a tablet is shown in the photograph; note that components are mounted on both sides.

At higher magnification, the X-ray of one of the corners also shows multiple tiers of overlapping wire bonds, as well as a network of small solder bumps (typically C4s).  This dual interconnection scheme is characteristic of stacked devices.

A cross section through the edge of the module confirms a stacked structure.  There are two modules interconnected through a BGA network on the perimeter of the module.  The bottom module in turn is connected to the printed circuit board with a BGA network.  IO of the top module is through a fan out of wire bonds.  The cross section confirms that the wire bonds indeed are in a tiered configuration.  Interestingly, there are three stacked chips in this top module.   Each chip accounts for one tier of wire bond IO.  The chip in the lower module is not evident until the cross section is deepened.  The printed circuit board is comprised of multiple layers of copper line embedded in a fiber glass reinforced resin.  This particular print circuit board has surface circuitry on each side, and six internal planes of circuitry.A cross section through the edge of the module confirms a stacked structure. There are two modules interconnected through a BGA network on the perimeter of the module. The bottom module in turn is connected to the printed circuit board with a BGA network. IO of the top module is through a fan out of wire bonds. The cross section confirms that the wire bonds indeed are in a tiered configuration. Interestingly, there are three stacked chips in this top module. Each chip accounts for one tier of wire bond IO. The chip in the lower module is not evident until the cross section is deepened. The printed circuit board is comprised of multiple layers of copper line embedded in a fiber glass reinforced resin. This particular print circuit board has surface circuitry on each side, and six internal planes of circuitry.

A comparison of the first cross section plane with a deeper plane shows that the inner cavity of the entire module to houses another chip.  IO of this inner chip is through C4s, the composition of which may be determined by SEM/EDX A comparison of the first cross section plane with a deeper plane shows that the inner cavity of the entire module to houses another chip. IO of this inner chip is through C4s, the composition of which may be determined by SEM/EDX.

SEM/EDX of a C4 indicates the elemental composition of the layers near the chip/solder interface.  The layer nearest the chip is comprised mainly of aluminum, copper, nickel, and titanium; all materials typically associate with silicon interconnections.  This gives way to nearly pure nickel, suggesting that the C4 pad of the chip was top plated with a relatively thick layer of nickel.  On the solder side of the C4 pad, the composition is mainly copper, nickel, and tin and suggests a tin rich solder bump.SEM/EDX of a C4 indicates the elemental composition of the layers near the chip/solder interface. The layer nearest the chip is comprised mainly of aluminum, copper, nickel, and titanium; all materials typically associate with silicon interconnections. This gives way to nearly pure nickel, suggesting that the C4 pad of the chip was top plated with a relatively thick layer of nickel. On the solder side of the C4 pad, the composition is mainly copper, nickel, and tin and suggests a tin rich solder bump.

SEM/EDX analyses of the bulk solder shows grain regions, some of which are lead-rich, and some of which are tin-rich.  Tin-copper compounds are evident at the solder interface on the chip carrier side of the C4 connection.SEM/EDX analyses of the bulk solder shows grain regions, some of which are lead-rich, and some of which are tin-rich. Tin-copper compounds are evident at the solder interface on the chip carrier side of the C4 connection.

Another multichip configuration is found in one of the modules on the right hand side of the board.  The X-ray shows several different gray shades in the module, which is consistent with multiple components, each of varying thickness.  Also evident is the solder connection around the edge of the module.Another multichip configuration is found in one of the modules on the right hand side of the board. The X-ray shows several different gray shades in the module, which is consistent with multiple components, each of varying thickness. Also evident is the solder connection around the edge of the module.

At higher magnification, the X-ray shows wire bonds of two of components, as well as arrays of filled vias.  The filled vias look like C4s in the X-ray, but the cross section shows that the array of dark spots is indeed filled vias.  Voids in the solder connections are visible as light circles in the X-ray, and may be expected from screened and reflowed solder paste.At higher magnification, the X-ray shows wire bonds of two of components, as well as arrays of filled vias. The filled vias look like C4s in the X-ray, but the cross section shows that the array of dark spots is indeed filled vias. Voids in the solder connections are visible as light circles in the X-ray, and may be expected from screened and reflowed solder paste.

Sequential cross sectioning shows different features of the module.  Two of the devices depend on wire bonds for IO to the carrier, the other components are surface mounted.  The carrier has four planes of circuitry; two on the surface, and two internal.   The module is connected to the printed circuit board by LGA with solder paste on the pads. Sequential cross sectioning shows different features of the module. Two of the devices depend on wire bonds for IO to the carrier, the other components are surface mounted. The carrier has four planes of circuitry; two on the surface, and two internal. The module is connected to the printed circuit board by LGA with solder paste on the pads.

Direct mounting of the chip to the printed circuit board is yet another packaging configuration encountered in the teardown of this populated circuit board.  The cross section shows the connection of the chip to the printed circuit board through solder balls.  The flat section shows the footprint of the solder array as well as the passivation layer and surface circuitry of the chip. Direct mounting of the chip to the printed circuit board is yet another packaging configuration encountered in the teardown of this populated circuit board. The cross section shows the connection of the chip to the printed circuit board through solder balls. The flat section shows the footprint of the solder array as well as the passivation layer and surface circuitry of the chip.


Binghamton University State University of New York
PO BOX 6000   Binghamton, NY 13902-6000

Last Updated: 6/1/11