Skip header content and main navigation Binghamton University, State University of New York - Ieec

Cover Photo 

2012 Electronics Packaging Symposium    

Technology Advances in Small Scale Systems and Microelectronics Packaging     

October 9-10, 2012, General Electric Global Research, Niskayuna, New York

Tuesday, October 9, 2012 

07:30 AM - 08:00 AM   Registration and Continental Breakfast (Gallery)
08:00 AM - 08:20 AM  

Welcome and Opening Remarks :

Jerry Trant, GE Global Technology Leader, Micro & Nano Structure Technologies

Bahgat Sammakia, Interim Vice President for Research and Director, the New York State Center of Excellence in Small Scale Systems Integration and Packaging


Keynote Session - Steinmetz Auditorium
Technology Advances
Chairs: Bill Infantolino, Binghamton University and Kaustubh Nagarkar, GE

08:20 AM   - 09:00 AM   3D Packaging – A SEMATECH Perspective - Raj Jammy, Sematech 
09:00 AM   - 09:40 AM   Gen3 Thermal Packaging Technology: Microfluidics and Thermal Interconnects - Avram Bar-Cohen, DARPA/University of Maryland 
09:40 AM   - 10:00 AM   Break 
10:00 AM   - 10:40 AM   Materials Science Challenges in the Packaging Technology Roadmap – Peter Brofman, IBM
10:40 AM   - 11:20 AM   Market and Technology Trends of Mobile Electronics - Mark Christensen, Prismark Partners 
        Steinmetz Auditorium   Langmuir Lyceum
        Thermal Challenges
Chairs: Katie Rivera IBM and Emad Sammadiani, Binghamton University
Chairs: Vivian Ryan, Global Foundries and Nancy Stoffel, GE
11:30 AM   - 12:00 PM   Data Center Measurement and Management Technologies - Hendrik Hamann, IBM   3D Integration – A Corner Technology for Heterogeneous Integration - Pol Marchal, IMEC 
12:00 PM  - 12:30 PM   Package Level Thermal-Mechanical Challenges - Kamal Sikka, IBM   Status and Challenges of 3-D Integration Using TSVs for Mobile Devices - Urmi Ray, Qualcomm
12:30 PM   - 01:40 PM   Lunch / Posters (Gallery) 
12:40 PM - 1:10 PM   Lunch Speaker Shekhar Borkar, Intel - Ubiquitous Computing in the Coming Year—Technology Challenges and Opportunities (Steinmetz)
01:40 PM   - 02:10 PM   Overview of Electronics Cooling Research in GE - Yogen Utturkar, GE   Thermal Management and Reliability of Quantum Cascade Lasers (QCL) – Satish Chaparala, Corning Incorporated
02:10 PM  - 02:40 PM   Vapor Chamber Heat Spreaders for High Power and Packaging Density Electronic Systems - David Altman, Ratheon Integrated Defense Systems   Design of 3D Specific Systems - Paul Franzon, NCSU
Chairs: Asif Chowdhury, ADI and David Lin, GE
  Power Electronics
Chairs: Steve McKeown, BAE and Shakti Chauhan, GE
02:50 PM   - 03:20 PM   MEMS Packaging – A Key Differentiator for Success - Marc Papageorge, Icintek   Embedding Technologies for Power Electronic Applications - Rolf Aschenbrenner, Fraunhoffer
03:20 PM  - 03:50 PM   Advanced Packaging and 3D Integration for MEMS and Integrated Circuits - Jeremy Muldavin, MIT Lincoln Laboratory   Trends of Power Electronic Packaging - Yong Liu, Fairchild Semiconductor Corporation
03:50 PM   - 04:10 PM   Break / Posters (Gallery) 
04:10 PM   - 04:40 PM   Power MEMS and Their Packaging Challenges - Luc Frechette, University de Sherbrooke    Insulated Gate Bipolar Transistors (IGBT)in Hybrid Electrical Vehicle (HEV) Applications - Nathan Gill, BAE Systems
04:40 PM  - 05:10 PM   Graphene-Enabled Electronics: Devices and Interconnects - Bin Yu, SUNY Albany   Power Overlay Packaging Platform - Arun Gowda
05:10 PM - 06:30 PM   Poster Session and Reception (Gallery)
06:30 PM - 08:50 PM   Dinner Speaker: Ljubisa Stevanovic ,GE- Technology Trends in Power Packaging (Gallery)

Wednesday, October 10, 2012 

07:30 AM - 08:00 AM   Continental Breakfast (Gallery)
        Steinmetz Auditorium   Langmuir Lyceum
        Harsh Environments
Chairs: Dave Shaddock, GE and Junghyun Cho, Binghamton University
  3-D Packaging
Chairs: Lei Fu, AMD and Sungbae Park, Binghamton University
08:00 AM   - 08:30 AM   Solder and Die Attach for High Temperature Electronic Packaging - Patrick McCluskey, University of Maryland   Measured Thermal Resistance of Microbumps in 3D Chip Stacks - Evan Colgan, IBM, T.J. Watson Research Center
08:30 AM  - 09:00 AM   Reliability of BiAgX Solder as a Drop-in-Solution for High Temperature Lead-Free Die-Attach - Hongwen Zhang, Indium Corporation   2.5/3D IC Integration of Advanced Technology Node - Shan Gao, Global Foundries
09:00 AM  - 09:30 AM   Die Attach Techniques for High Temperature/Harsh Environment Packaging: A Shifting Melting Point -
Pedro Quintero, University of Puerto Rico-Mayaguez 
  Cu-Cu Direct Bonding for Next Generation Ultra-High Density 3D Interconnects - Brian Sapp, SEMATECH
09:30 AM  - 10:00 AM   Alumina Based 500C Electronic Packaging Systems and Future Development - Liang-Yu Chen, NASA/Ohio Space   Advanced Packaging Technologies for LED-Based Smart Lighting Systems – James Lu, RPI
10:00 AM - 10:20 AM   Break
        Steinmetz Auditorium   CR9
        Flexible/Printed Electronics
Chairs: Mark Poliks, Endicott Interconnect Technologies and Howard Wang, Binghamton University
  Emerging Interconnect Technologies
Chairs: Martin Anselm, Universal Instruments and Jim Rose, GE
10:20 AM   - 10:50 AM   NanoCopper Materials Platform for Electronic Packaging and Printed Electronics w/200°C Processing Temperature – Alfred Zinn, Lockheed Martin   Development of Through Glass Via (TGV) Substrates for 3D-IC Integration - Aric Shorey, Corning Incorporated
10:50 AM  - 11:20 AM   Ultra-Slim Flexible Glass for Electronic Applications - Sean Garner, Corning Incorporated   3D-IC Markets and Technology Drivers - Charles Woychik, Invensas Corporation
11:20 AM  - 11:50 AM   Functional Devices via Additive Driven Self-Assembly and Nanoimprint Lithography: Towards Solution-Based R2R Fabrication - Jim Watkins, University of Massachusetts   Package-Interposer-Package (PIP) A Breakthrough Package-on-Package (PoP) Technology for 3D-Integration - Rabindra Das, Endicott Interconnect Technologies, Inc.
11:50 AM  - 12:20 PM   Reliability of Thin Film Flexible Electronics - Sandeep Tonapi, Anveshak Technology and Knowledge Solutions   Front End of Line Through Silicon Via (FEOL-TSV) Fabrication - Subhash Sinde, Sandia National Labs
12:20 PM       Symposium Adjourns
12:30 PM       Optional Networking Lunch
Binghamton University State University of New York
PO BOX 6000   Binghamton, NY 13902-6000

Last Updated: 4/26/13